Intel launches Agilex 7 with R-tile, the first FPGA with PCIe 5.0

Intel launches Agilex 7 with R-tile, the first FPGA with PCIe 5.0

Intel’s Programmable Solutions Group has announced the Agilex 7 with R-Tile. What makes this FPGA special is that it features PCIe 5.0 support and the relatively young CXL technology. With this new product, data centers can integrate their FPGAs seamlessly with server processors.

Intel notes that organizations today face significant constraints on time, budget and power consumption. Hence, many companies in the data center, telecom and financial industries choose FPGAs for programmable and efficient solutions. With Agilex 7 FPGAs, these organizations should be able to quickly integrate their proprietary technologies into their IT environments.

From hours to minutes

Programmable Solutions Group Corporate VP and GM at Intel Shannon Poulin elaborates on this. “Customers are demanding cutting-edge technology that offers the scalability and customization needed to not only efficiently manage current workloads, but also pivot capabilities and functions as their needs evolve. Our Agilex products offer the programmable innovation with the speed, power and capabilities our customers need while providing flexibility and resilience for the future. For example, customers are leveraging R-Tile, with PCIe Gen 5 and CXL, to accelerate software and data analytics, cutting the processing time from hours to minutes.”

These FPGAs promise two times faster PCIe bandwidth and four times the previous CXL bandwidth. As might be expected, Intel recommends the use of Intel Xeon processors for maximum utilization of these technologies. Using efficient page placement on Xeon servers thanks to FPGAs with CXL memory should increase Linux performance by 18 percent.

Also read: Intel adds vRAN to 4th Gen Intel Xeon SoCs